This nonprovisional application claims priority under 35 U.S.C. xc2xa7119(a) on Patent Application No. 2002-0001367 filed in KOREA on Jan. 10, 2002, which is herein incorporated by reference.
The present invention relates to a method for fabricating a semiconductor device; and, more particularly, to an image sensor and a method for fabricating the same.
Image sensor is a semiconductor device that converts an optical image into an electrical signal. Among the image sensors, a charge coupled device (CCD) is a device wherein an individual metal-oxide-silicon (CMOS) capacitor is closely allocated to each other, and carriers are stored and transferred to the MOS capacitor. A complementary metal-oxide semiconductor device (CMOS) image sensor employs CMOS technology using a control circuit and a signal processing circuit as peripheral circuits. In the CMOS image sensor, MOS transistors are formed as the same number of pixels in the peripheral circuit, and a switching mode is adopted for detecting sequentially outputs with use of the MOS transistors.
The CMOS image sensor includes a color filter arrayed on top of a light sensing element that generates and stores an optical charge after receiving light from an external source. The color filter array (CFA) can be classified with three colors of red (R), green (G) and blue (B) or those of yellow (Y), magenta (M) and cyan (C).
Also, the image sensor is constituted with a light sensing element for sensing light and a logic circuit component for processing the sensed light into an electrical signal, which is, in turn, systemized into data. There has been numerously attempted to improve a fill factor, which represents an areal ratio of the light sensing element with respect to the overall image sensor. However, these attempts are limited since the logic circuit component cannot be basically removed.
Accordingly, there introduced a light condensing technology for changing paths of incident lights that enter to areas other than the light sensing element and condensing the incident lights into the light sensing element so as to enhance a level of light sensing. To realize the light condensing technology, a method for forming a microlens on the color filter of the image sensor is particularly used.
A unit pixel of the typical CMOS image sensor has one photodiode area (hereinafter referred as to PD) and four N-channel metal-oxide semiconductor (NMOS) transistors, that are, a transfer transistor Tx, a reset transistor Rx, select transistor Sx and a drive transistor Dx. With respect to a specific function of each of the four NMOS transistors, the Tx is for transferring photo-generated charges collected at the PD to a floating diffusion area (hereinafter referred as to FD). The Rx is for resetting the FD by setting an electric potential of a node into a desired value and then releasing a charge (Cpd). Also, the Dx enacts as a source follower buffer amplifier, and the Sx is for providing a function of addressing with a switch.
Herein, the Tx and the Rx uses a native NMOS transistor, whereas the Dx and the Sx uses a normal NMOS transistor. Especially, the Rx is a transistor for a correlated double sampling (CDS).
The unit pixel of the above-described CMOS image sensor uses the native NMOS transistor so to sense rays in the visible wavelength bandwidth at the PD and then transfer detected photo-generated charges to the FD, i.e., an amount of the photo-generated charges transferred to a gate of the Dx is outputted in an electric signal from an output terminal Vout.
FIG. 1 is a cross-sectional view showing a typical CMOS image sensor in accordance with a prior art. Particularly, FIG. 1 shows merely a PD, a transfer transistor Tx and a FD.
Referring to FIG. 1, a p-type epi layer 12 that is undergone with an epitaxial growth is formed on a P+ substrate 11. Also, a field oxide layer 14 for isolating devices is formed on the p-type epi layer 12. A field stop layer l3 for an n-channel field stop layer is formed beneath the field oxide layer 14.
Herein, the field stop layer 13 is allocated only beneath the field oxide layer 14 since ions are implanted without any tilts into the p-type epi layer 12 where the field oxide layer 14 is formed. Therefore, an n diffusion area 16 constituting the PD has only a boundary with an edge of the field oxide layer 14, but does not affect an area of the nxe2x88x92 diffusion area 16.
In addition, a gate electrode 15 of a Tx is formed on the p-type epi layer 12. Also, a spacer 17 is then formed at lateral sides of the gate electrode 15. The nxe2x88x92 diffusion area 16 is formed deeply in the p-type epi layer 12 by being aligned to an edge of one side of the gate electrode 15. A shallow p0 diffusion layer 18 is then formed on top of the nxe2x88x92 diffusion layer 16 as being aligned to one side of the spacer 17.
Eventually, a PD including a deep nxe2x88x92 diffusion area 16 and a shallow p0 diffusion area 18 is formed. A FD 19 is formed in the p-type epi layer 12 as being aligned to the spacer formed at the other side of the gate electrode 15.
Meanwhile, one side of an ion implantation mask MK1 (not shown) for forming the nxe2x88x92 diffusion area 16 is aligned to a center of the gate electrode of the Tx, while the other side of the ion implantation mask MK1 is aligned to the field oxide layer 14.
FIG. 2 is a plane view of FIG. 1 showing the typical CMOS image sensor in accordance with the prior art. One side of the gate electrode of the Tx is overlapped to an active area for providing the PD. The FD is formed below the other side of the gate electrode of the Tx.
Also, in the active area defined by the field oxide layer (FOX), the PD has a relatively larger area; however, an area between the PD and the FD becomes smaller. This effect is called a bottle-neck effect.
Meanwhile, as shown in FIG. 1, when forming the nxe2x88x92 diffusion layer 16 constituting the PD, the nxe2x88x92 diffusion layer 16 is formed entirely on the active area except for a portion superposed on the gate electrode 15 of the Tx since the ion implantation mask MK1 has a wide width compared to the actually formed nxe2x88x92 diffusion layer 16. Therefore, the nxe2x88x92 diffusion area 16 is contacted to the field oxide layer FOX.
In the above-described prior art, if there exists a reverse bias between the nxe2x88x92 diffusion layer 16 and the p-area including the p0 diffusion layer and the p-type epi layer, the nxe2x88x92 diffusion layer 16 becomes fully depleted when a concentration of impurities contained in the nxe2x88x92 diffusion layer 16 and the p-area is properly controlled. As a result of this full depletion, the depletion is also extended to the p-type epi layer 12 allocated beneath the nxe2x88x92 diffusion layer 16 and the p0 diffusion layer 18 allocated above the nxe2x88x92 diffusion layer 16. Especially, the depletion occurs in more extents in the p-type epi layer 12 having a relatively lower dopant concentration.
The image sensor having the above PD takes out electrons stored into the PD and obtains an electrical output signal, i.e., current or voltage. A maximum output signal is in a proportional relationship with the number of electrons that can be taken out from the PD, and thus, the number of electrons generated and stored in the PD due to inputs of light should be increased in order to increase the output signals.
The electrons generated at the depletion layer of the PD are converted to an electrical output signal such as a voltage or a current. Hence, the ion implantation is proceeded in such that a dopant concentration of the p0 diffusion layer 18, which is a surface layer, should be higher than that of the nxe2x88x92 diffusion layer 16 and the p-type epi layer 12, which are a bottom layer.
Meanwhile, in the prior art, when incident lights are inputted, there occurs an electron hole pair (EHP) at the nxe2x88x92 diffusion layer 16, which is the depletion layer. The hole (H) of the EHP is drained to the p+ substrate 11, and the electron (e) is accumulated and transferred to the FD 19 through the transfer transistor Tx so as to attain image data.
However, the prior art has a problem in that crystalline defects occur mainly at the edge of the field oxide layer 13 when applying an oxidation process to the field oxide layer 13. A point defect, a line defect, an area defect and a volume defect are examples of the crystalline defects.
Eventually, electrons (e) are generated and stored due to the crystalline defects occurring at the edge of the field oxide layer 14 even when incident lights are not inputted. Therefore, there occurs dark current (D) flowing from the PD to the FD 19.
In other words, the electrons should be generated and stored at the depletion layer, i.e., the nxe2x88x92 diffusion layer 16 of the PD only when the incident lights are inputted, and then, the stored electrons are transferred to the FD so to make current flow. However, the crystalline defects present at the edge of the field oxide layer 14 are in a state of generating electrons easily in a thermal aspect even without inputs of the incident lights. Thus, if there exists a plurality of defects even in a dark state without any light, the image sensor shows an abnormal state by acting as if there are inputs of the incident lights.
To solve the above problem, it is suggested to employ an ion implantation mask MK2 of which linewidth is relatively smaller than the MK1 for forming the deep nxe2x88x92 diffusion layer 16 (referred to FIG. 2). However, this approach is sensitive to an overlay since there occurs no self-alignment during the ion implantation mask MK2 process for forming the deep nxe2x88x92 diffusion layer 16. Also, there is another problem in that the nxe2x88x92 diffusion layer 16 is extended near to an edge of the field oxide layer FOX due to a subsequent thermal process.
It is, therefore, an object of the present invention to provide an image sensor capable of suppressing generation of dark current due to crystalline defects at an edge of a field oxide layer and a method for fabricating the same.
In accordance with an aspect of the present invention, there is provided an image sensor, comprising: a semiconductor substrate; an active area including a photodiode area formed in a predetermined position of the substrate, a floating diffusion area having a smaller area than the photodiode area and a channel area having a bottle-neck structure connecting to the photodiode area and the floating diffusion area; a field area for isolating electrically the active area; a field stop layer being formed beneath the field area by having a wider area than the field area through an expansion towards the active area with a first width; and a gate electrode formed on the substrate by covering the channel area and having one side superposed with a second width on one entire side of the photodiode contacted to the channel area.
In accordance with another aspect of the present invention, there is also provided an image sensor, comprising: a substrate; an active area including a photodiode area formed in a predetermined position of the substrate, a floating diffusion area having a smaller area than the photodiode area and a channel area having a bottle-neck structure connecting to the photodiode area and the floating diffusion area; a field area for isolating electrically the active area; a field stop layer being formed beneath the field area by having a wider area than the field area through an expansion towards the photodiode area with a first width; and a gate electrode formed on the substrate by covering the channel area and having one side superposed with a second width on one entire side of the photodiode contacted to the channel area.
In accordance with still another aspect of the present invention, there is also provided a method for fabricating an image sensor, comprising the steps of: forming an isolation mask that exposes partially a surface of the substrate; forming a first diffusion layer having a wider area than an exposed area of the isolation mask in the exposed substrate; forming a field oxide layer having a smaller area than the first diffusion layer on the first diffusion layer; forming a gate electrode on an active area of the substrate defined by the field oxide layer; forming a second diffusion layer being aligned to an edge of one side of the gate electrode in the substrate and to the first diffusion layer; and forming a third diffusion layer being aligned with a predetermined distance from the edge of the one side of the gate electrode formed in the second diffusion layer.
In accordance with still another aspect of the present invention, there is also provided a method for forming an image sensor, comprising the steps of: forming on the substrate a first isolation mask that exposes a surface of one side of the substrate; forming a first diffusion layer having a wider area than an exposed area of the first isolation mask formed in the exposed substrate; forming on the substrate a second isolation mask that exposes the other side of the substrate; forming a second diffusion layer having an area identical to an exposed area of the second isolation mask formed in the exposed substrate; forming on the first diffusion layer a first field oxide layer having a smaller area than the first diffusion layer as simultaneously as forming on the second diffusion layer a second field oxide layer having an area identical to the second diffusion layer; forming a gate electrode extending on the active area of the substrate and simultaneously on the second field oxide layer; forming a third diffusion layer being aligned to an edge of one side of the gate electrode in the substrate and the first diffusion layer; and forming a forth diffusion layer being aligned with a predetermined distance from the edge of the one side of the gate electrode in the third diffusion layer.